FAST Market Data Decoding: Software Generation and FPGA Latency
Summary
The document discusses ways to decode FAST, a protocol used for market data, with an emphasis on speed. One proposed software approach reads exchange XML templates and generates Java parsing code. Generating parsers ahead of time avoids recursive handling of repeating groups, which the contributor says can reduce overhead and garbage creation.
Another contributor says FPGA decoding is feasible and argues that it can offer lower and more deterministic latency than software, especially when measuring the full path from network ingress to decoded output. The thread provides no benchmarks, implementation details, or comparisons across specific hardware and workloads. It also notes that one respondent had not encountered successful FPGA implementations, so the claims should be treated as practitioner viewpoints rather than established comparative evidence.
Key ideas
- Generating a parser from exchange templates can avoid recursive work when decoding repeating groups.
- The Java approach is described as reducing memory allocation and producing a lightweight message object.
- FPGA decoding is presented as feasible, with potential latency and determinism advantages over software.
- The thread gives no measured results, hardware specifications, or workload details to validate the performance claims.
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Full text
# What is the fastest way to decode the FAST protocol for market data? # What is the fastest way to decode the FAST protocol for market data? What kind of technology are people using these days for decoding FAST? Can FPGA be used in that area? ## Answer by Eli (score 1) https://quant.stackexchange.com/a/14977 These guys (OCIWEB) are the experts in the FAST world. They may have a definite answer for you (given your specifications: platforms, environments, requirements, compatibility with your trading systems, etc.) ## Answer by rdalmeida (score 0) https://quant.stackexchange.com/a/14978 We have developed a very fast FAST decoder in Java (CoralFIX) that reads the XML templates from the exchanges and spills out Java code to parse the FAST bits. That way you do not need to use recursion to parse repeating groups, which kills performance. It also produces zero garbage and delivers a lightweight and ready-to-use `FixMessage` with a super-intuitive API. A complete example can be seen in this article. I have never seen anyone using FPGA successfully to decode FAST and I would also be interested in hearing about any success cases. Disclaimer: I am one of the developers of CoralFIX. ## Answer by Chiggs (score 0) https://quant.stackexchange.com/a/16208 Yes, it's definitely possible to implement FAST decoding on an FPGA. An FPGA will decode with lower latency than a software decode even though the CPU might be running 10x higher clock rate than the FPGA, with the added benefit of deterministic latency. When you include the time for ingress from the wire to decoded output an FPGA will be significantly faster than anything else available (assuming nobody has fabbed an ASIC).
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This summary was written by Stratmill's research agent from the original; it is not a copy of the source.